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Wenwei Zha

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18岁前:芜湖人(育红幼儿园-〉安师大附小-〉芜湖一中)
18岁--22岁:北京人(海淀区-〉清华电机)
22岁--24岁:密苏立大学罗拉分校
24岁--25:ESS Technology的ASIC Engineer。工作真的是比学校累啊,不过人还是忙一些好,特别是年轻、还能学得动的时候。
25--?? @VT,也许是我的宿命吧,哪怕是注定要犯的错……
吾不能变心以从俗兮,
故将愁苦而终穷!

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October 02

Very interesting finding about V4 CLB configuration bits

The logic function bits (LUT, DFF, MUX ...) for a column of 16 CLBs
are in 4 continuous frames (LUT function are in frame 1, 3; DFF bits
are in frame 0, 2).

I'm make some change in the LUT truth tables (with fpga_editor or ise
or whatever) and these changes affect frames 1 and 3. Actually, my
logic change will turn off 4 LEDs.

I can make bitgen to generate a partial bitstream file. I can then
download this pr bit file using impact or ICAP. This works - and the
pr bit file only write to frame 1 and 3.

I tried another approach: I read back the configuration bits of the 4
frames from ICAP, I made modification to the bits of frame 1 and frame
3 - I know how to change the internal bits for LUT and they look
exactly the same as the bits in the pr bit file generated by bitgen.

Then I write the 4 frames back through ICAP and interesting cases
occurs:
1) if I only write frame 1 and 3, this is essentially the same as
downloading the pr bit file, and the logic change is perfect; all LEDs
are off.
2) if I write the 4 frames in the oder frame 0, 1, 2, 3, hoops ... LED
3 and 4 are on! And even downloading the pr bit file again can't turn
them off. Something weird happens! Yet, from ICAP read back, the LUT
bits are changed ...
3) if I write 4 frames 0, 1, 2, (3), where frame (3) is not modified,
LED 1 & 3 are on and 2 & 4 are off - make sense;
4) if I write 4 frames 0, (1), 2, 3, where frame (1) is not modified,
LED 2 & 4 are on and 1 & 3 are off - make sense;
......
x) if I write 4 frames in the order 1, 3, 0, 2, again it works.

I spent a whole day to look for reasoning behind this ... but it just
seems non-sense.

While, a fix for 4 frames of CLB logic bits could be just write frame
1&3 together and frame 0&2 together; but how about the other 18 frames
of CLB routing bits? How to debug similar weird case and get a fix?

One night at lab ...

A whole night ... I missed the last bus so I have to stay until the first bus at 7:15am.

Should finish the logic bits generation program though WAR ICAP, but a demo of inserting a counter might still fail to meet the deadline today ...
September 22

A Sudoku Solver

Wrote for a course project. Original intention was hardware implementation, but only finished this software emulation as an early step.

It can not solve very hard problems - only applies simple rules. The good thing is it shows how to solve a problem; the bad thing is that the problem pool is too small. Run in Linux.

Main program:
http://zhawenwei.googlepages.com/sudoku

Problem pool:
http://zhawenwei.googlepages.com/sudoku.dat

(main program randomly pick up a problem in the pool.)

Another version:
http://zhawenwei.googlepages.com/sudoku_1
(It always pick up the first problem in the pool. So you can manually add a problem in sudoku.dat. Note that each problem consists of 50 lines of text and the first line should be the number of effective lines.)
September 13

出离愤怒了!

凌晨在实验室搞到快2点才回家(小概率事件……纯属临时抱佛脚……),早上9点爬起来看国米的比赛。Sopcast画面质量不错,但是90分钟的比赛里,网断了2~3次——进球都没看到!!NND!下次坚决用有线看球!
September 08

Update

1. 学习Java ing(没有指针,太赞了!)
2. 等待硬盘ing(1.5T的Samsung$98, Rosewill RX35硬盘盒$23,加起来比Samsung1.5T的外置硬盘也就便宜8、9刀,好在是free shipping。。。没辙,没有好deal撒)
3. 努力工作!(集中一点,坚持一点……)
 
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